ECARX Debuts EXP01 Processor at RISC-V Summit Europe 2025, Outlines Next-Generation MCU Roadmap and Global RISC-V Strategy

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ECARX LIMITED
ECARX LIMITED

SHANGHAI, May 16, 2025 (GLOBE NEWSWIRE) -- ECARX Holdings Inc. (Nasdaq: ECX) (“ECARX” or the “Company”), a global mobility tech provider, announced the debut of its EXP01 processor built on the RISC-V architecture at the RISC-V Summit Europe 2025 which was held from May 12-15, 2025, in Paris. Alongside this technical breakthrough, ECARX also outlined its roadmap for the next-generation MCU, deepened technical collaborations with the RISC-V ecosystem, and reaffirmed its commitment to accelerating RISC-V adoption in intelligent mobility solutions.

RISC-V is a completely open-source instruction-set architecture that provides a simple, modular foundation for building customized processors. Unlike proprietary chip designs, RISC-V lets engineers identify and select only the features they need, enabling faster innovation, lower power consumption, and optimized development costs across a broad range of auto electronic applications.

ECARX showcased EXP01, its first processor design built on the 32-bit RISC-V ISA. EXP01 uses a dual-core safety architecture in which two identical cores run in unison to continuously verify each other’s operation, earning it the highest level of functional safety certification, ISO 26262 ASIL-D. This fail-safe design delivers reliable performance for critical in-vehicle functions such as advanced driver assistance and intelligent cockpit interfaces, underscoring ECARX’s robust capabilities in automotive-grade safety development and management.

Building on this milestone, ECARX also outlined the R&D roadmap for its next-generation automotive-grade MCU, a scalable microcontroller specifically designed for intelligent cockpit and body-domain control applications. The MCU was developed to meet ISO 26262 ASIL-B safety standards and will support current and future encryption protocols, ensuring seamless compliance with international data regulations.

During the event, ECARX’s Head of R&D, Mr. Wei Jian, engaged in in-depth technical workshops with leading RISC-V developers, including StarFive Technology. These conversations are laying the groundwork for joint research and development initiatives to accelerate integration of RISC-V-based computing platforms into next-generation vehicle architectures worldwide.

Mr. Ziyu Shen, Chairman, and CEO of ECARX, commented: “EXP01 marks a critical step in our mission to deliver highly reliable open-architecture computing platforms for the automotive industry. Leveraging our global ecosystem of partnerships, we are continuously enhancing the performance and safety of our hardware and software stack, offering automakers a unique value proposition with several solutions that can be seamlessly customized for deployment in any market. RISC-V’s open architecture drives faster innovation and optimizes costs, directly aligning with our goal to keep automakers at the forefront of technological change with cost-effective solutions. With our MCU roadmap and deepening collaborations, we are well positioned to lead the intelligent mobility revolution powered by RISC-V.”