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Cadence Design Systems, Inc. (CDS.F)

286.10
+0.65
+(0.23%)
As of 3:42:23 PM GMT+2. Market Open.

Key Executives

Amounts are as of December 31, 2024 and compensation values are for the last fiscal year ending on that date. Pay is salary, bonuses, etc. Exercised is the value of options exercised during the fiscal year. Currency in EUR.
NameTitlePayExercisedYear Born
Dr. Anirudh Devgan Ph.D. CEO, President & Director 1.74M 19.97M 1970
Mr. John M. Wall Senior VP & CFO 1.07M 5.89M 1971
Mr. Thomas P. Beckley Senior Vice President of Strategic Technology Programs 879.52k 20.65M 1958
Dr. Chin-Chi Teng Ph.D. Senior VP and GM of the Digital & Signoff Group 868.72k 11.58M 1966
Dr. Paul Cunningham Ph.D. Senior VP & GM of the System and Verification Group 879.23k -- 1978
Mr. Paul Scannell Senior Vice President of Customer Success Team 819.75k -- 1966
Mr. Ariel Sella Co-Founder -- -- --
Mr. Tarak Ray Chief Information Officer & Senior VP -- -- --
Mr. Richard Gu Vice President of Investor Relations -- -- --
Ms. Yoon Kim Corporate VP of Global Human Resources -- -- --

Cadence Design Systems, Inc.

Building 5
2655 Seely Avenue
San Jose, CA 95134
United States
408 943 1234 https://www.cadence.com
Sector: 
Technology
Full Time Employees: 
12,837

Description

Cadence Design Systems, Inc. provides software, hardware, and other services worldwide. The company offers functional verification services, such as Jasper, a formal verification platform; Xcelium, a parallel logic simulation platform; Palladium, an enterprise emulation platform; and Protium, a prototyping platform for chip verification. It also provides digital IC design and sign off products, including Genus synthesis and Joules RTL power solutions, as well as Modus DFT software solution to reduce systems-on-chip design-for-test time; physical implementation tools, such as place and route, optimization, and performing sign-off checks for manufacturing; and Innovus implementation system, a digital IC design and signoff solution. In addition, the company offers custom IC design and simulation, such as Virtuoso Studio, a solution platform for custom, analog, mixed-signal, photonics, and RF semiconductors; and system design and analysis products, a Multiphysics platform that helps in design and simulate electronics and entire systems in electromagnetic, thermal, structure, computational fluid dynamics, molecular, PCB and packaging, mechanical, and structural analysis. Further, it provides semiconductor IP product for design architectures; Functional Verification; digital ic design and signoff; EDA product that addresses the design and verification for semiconductor chips and manufacturing process technologies; and verification IP with memory models to emulate and model the expected behavior and interaction of standard industry system interface protocols. Additionally, it offers services related to methodology, education, and hosted design solutions, as well as technical support and maintenance services. It serves consumer, hyperscale computing, 5G communications, mobile, automotive, aerospace and defense, industrial, and life science industries. Cadence Design Systems, Inc. was incorporated in 1987 and is headquartered in San Jose, California.

Corporate Governance

Cadence Design Systems, Inc.’s ISS Governance QualityScore as of May 1, 2025 is 3. The pillar scores are Audit: 3; Board: 4; Shareholder Rights: 1; Compensation: 9.
Corporate governance scores courtesy of Institutional Shareholder Services (ISS) Scores indicate decile rank relative to index or region. A decile score of 1 indicates lower governance risk, while a 10 indicates higher governance risk.

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